- Posted 10 March 2023
- Salary $200K OTE (base + ABP + QBP)
- LocationAustin
- Job type Full Time
- DisciplineSoftware Engineering
- Reference151930
Senior Pre-Silicon Verification Engineer
Job description
About the Company:
American multinational corporation and technology company headquartered in Santa Clara, California, is the world's largest semiconductor chip manufacturer by revenue. The team's unmatched depth of experience and scope of vision allows it to dream big, to create the future of computing and communications—including powerful processors and accelerators that unlock the full potential of data. Continuously delivering advances in performance, power, and connectivity across a diversity of data-centric workloads, so its customers can harness the raw power of data. Company innovations span architecture, memory, software, and security to help develop transformative products and experiences for its customers. 107,000 employees worldwide are working together to enable unique experiences in 5G, artificial intelligence, driverless cars, and much more.
What You’ll Be Doing:
Responsible for the full lifecycle of verification from planning to test execution and include collecting and closing coverage.
Closely interface with architecture and design teams to understand design product requirements and develop comprehensive test plans.
Conduct, participate in test plan and test reviews, develop verification components, and test and triage failures.
Mentor and provide guidance to junior verification engineers in the execution of their tasks.
To be successful in this role, you'll need the following:
Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field and 6+ years of industry work experience (Post Graduate Degree preferred)
6+ years of experience verifying complex designs both at the component and full-chip level
6+ years of experience in architecting and developing test benches and verification components like bus functional models and scoreboards/checkers
4+ years of experience in SystemVerilog-based UVM, OVM, VMM, or related object-oriented, and coverage-driven ASIC verification methodology.
Experience in verifying complex designs both at the component and full-chip level.
Experience with TCP IP.
Experience with NVMe.
Experience in Ethernet Networking verification or logic design.
Experience in software development and scripting
What is Being Offered:
Best-in-class compensation
Annual + Quarterly bonuses, stock programs
Cutting-edge health plan options
Generous time off
Life-long career growth opportunities
Education benefits: tuition assistance, classroom and online learning resources, career advisers
Relocation assistance
Flexible work options, job rotation programs
Wellness programs + Employee Assistance Plans/Programs