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Logic Design Engineer

Job description

About the Company: 
American multinational corporation and technology company headquartered in Santa Clara, California, is the world's largest semiconductor chip manufacturer by revenue. The team's unmatched depth of experience and scope of vision allows it to dream big, to create the future of computing and communications—including powerful processors and accelerators that unlock the full potential of data. Continuously delivering advances in performance, power, and connectivity across a diversity of data-centric workloads, so its customers can harness the raw power of data. Company innovations span architecture, memory, software, and security to help develop transformative products and experiences for its customers. 107,000 employees worldwide are working together to enable unique experiences in 5G, artificial intelligence, driverless cars, and much more.

What You’ll Be Doing:

  • Developing designs to be used across our product roadmaps.

  • Working with an international team of experts in IP development. Responsible for the entire front-end design with consideration of verification, timing, area, and power complexities. Finding and implementing corrective measures for failing RTL tests and applying all quality checks. 

  • Keeping a strong focus on efficient hardware design with broad SoC knowledge to tune hardware and software to achieve scalable and robust solutions. 

  • Providing guidance to junior engineers and assisting our firmware team, verification team, emulation team, software team, and customers.

To be successful in this role, you'll need the following:

  • Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field of study. (Post Graduate Degree preferred)

  • 6 plus years of experience in a relevant RTL design position, having gone through multiple project cycles to gather in-depth experience.

  • Experience with complex state machine and pipelined logic designs implemented in SystemVerilog.

  • Experience in debugging RTL test cases or firmware in a SystemVerilog simulation environment.

  • Experience in networking protocols (InfiniBand, TCP/IP, RDMA or RoCE).

  • Experience in high-speed ASIC or SOC design and debug (Verilog, fsdb).

  • Experience in post-silicon debug Experience in SOC emulation.

What is Being Offered:

  • Best-in-class compensation

  • Annual + Quarterly bonuses, stock programs

  • Cutting-edge health plan options

  • Generous time off

  • Life-long career growth opportunities

  • Education benefits: tuition assistance, classroom and online learning resources, career advisers

  • Relocation assistance

  • Flexible work options, job rotation programs

  • Wellness programs + Employee Assistance Plans/Programs